TY  - RPRT
T1  - New bounds for the longest edge of a tree in a VLSI layout
T3  - Saarbrücken, 1984
A1  - Kaufmann,Michael
Y1  - 2011/09/07
N2  - In the last three years many results were published about graph layout in VLSI. One aspect of graph layout is the minimization of the longest edge; for this problem Bhatt and Leiserson (1982) recently demonstrated a new technique to shorten the longest edge, and they thus achieved an upper bound of O(sqrt{N}/log N) for trees. Unfortunately, no good universal lower bounds exist. This paper presents a general techniques for proving lower bounds for trees. A second technique to embed trees is presented, which provides really good upper bounds for the maximal edge length in relation to the disposable area. 
CY  - Saarbrücken
PB  - Universitäts- und Landesbibliothek
AD  - Postfach 151141, 66041 Saarbrücken
UR  - http://scidok.sulb.uni-saarland.de/volltexte/2011/4213
ER  -